SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 1 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 e series power mosfet features ? low figure-of- merit (fom) r on x q g ? low input capacitance (c iss ) ? reduced switching and conduction losses ? low gate charge (q g ) ? avalanche energy rated (uis) ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ?computing - pc silver box / atx power supplies ? lighting - two stage led lighting ? consumer electronics ? applications using hard switched topologies - power factor correction (pfc) - two switch forward converter - flyback converter ? switch mode power supplies (smps) notes a. repetitive rating; puls e width limited by maximu m junction temperature. b. v dd = 50 v, starting t j = 25 c, l = 28.2 mh, r g = 25 , i as = 2.7 a. c. 1.6 mm from case. d. i sd i d , di/dt = 100 a/s, starting t j = 25 c. product summary v ds (v) at t j max. 550 r ds(on) max. at 25 c ( )v gs = 10 v 0.380 q g max. (nc) 50 q gs (nc) 6 q gd (nc) 10 configuration single n-channel mosfet g d s d 2 pak (to-263) g d s ordering information package d 2 pak (to-263) lead (pb)-free and ha logen-free SIHB12N50E-ge3 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 500 v gate-source voltage v gs 30 continuous drain current (t j = 150 c) v gs at 10 v t c = 25 c i d 10.5 a t c = 100 c 6.6 pulsed drain current a i dm 21 linear derating factor 0.91 w/c single pulse avalanche energy b e as 103 mj maximum power dissipation p d 114 w operating junction and storage temperature range t j , t stg -55 to +150 c drain-source voltage slope v ds = 0 v to 80 % v ds dv/dt 70 v/ns reverse diode dv/dt d 27 soldering recommendations (peak temperature) c for 10 s 300 c thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -62 c/w maximum junction-to-case (drain) r thjc -1.1
SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 2 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. c oss(er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 % to 80 % v dss . b. c oss(tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 % to 80 % v dss . specifications (t j = 25 c, unless otherwise noted) parameter symbol test cond itions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 500 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = 1 ma -0.60- v/c gate-source threshold voltage (n) v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na v gs = 30 v - - 1 a zero gate voltage drain current i dss v ds = 500 v, v gs = 0 v - - 1 a v ds = 400 v, v gs = 0 v, t j = 125 c - - 10 drain-source on-sta te resistance r ds(on) v gs = 10 v i d = 6 a - 0.330 0.380 forward transconductance g fs v ds = 30 v, i d = 6 a - 3.1 - s dynamic input capacitance c iss v gs = 0 v, v ds = 100 v, f = 1 mhz - 886 - pf output capacitance c oss -52- reverse transfer capacitance c rss -6- effective output capacitance, energy related a c o(er) v ds = 0 v to 400 v, v gs = 0 v -45- effective output capacitance, time related b c o(tr) - 131 - total gate charge q g v gs = 10 v i d = 6 a, v ds = 400 v -2550 nc gate-source charge q gs -6- gate-drain charge q gd -10- turn-on delay time t d(on) v dd = 400 v, i d = 6 a, v gs = 10 v, r g = 9.1 -1326 ns rise time t r -1632 turn-off delay time t d(off) -2958 fall time t f -1224 gate input resistance r g f = 1 mhz, open drain - 0.92 - drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode - - 10.5 a pulsed diode forward current i sm --21 diode forward voltage v sd t j = 25 c, i s = 7.5 a, v gs = 0 v - - 1.2 v reverse recovery time t rr t j = 25 c, i f = i s = 6 a, di/dt = 100 a/s, v r = 25 v - 244 - ns reverse recovery charge q rr -2.5-c reverse recovery current i rrm -19-a s d g
SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 3 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - c oss and e oss vs. v ds 0 6 12 18 24 30 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 25 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 4 8 12 16 20 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 150 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 5 10 15 20 25 30 0 5 10 15 20 25 i d , drain-to- s ource current (a) v gs , g ate-to- s ource voltage (v) t j = 150 c t j = 25 c v d s = 30.4 v 0 0.5 1.0 1.5 2.0 2.5 3.0 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 r d s (on) , drain-to- s ource on-re s i s tance (normalized) t j , junction temperature ( c) i d = 6 a v gs = 10 v 1 10 100 1000 10 000 0 100 200 300 400 500 c, capacitance (pf) v d s , drain-to- s ource voltage (v) c i ss c o ss c r ss v gs = 0 v, f = 1 mhz c i ss = c g s + c gd , c d s s horted c r ss = c gd c o ss = c d s + c gd 0 1 2 3 4 5 6 50 500 5000 0 100200300400500 e o ss (j) c o ss (pf) v d s c o ss e o ss
SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 4 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - typical gate charge vs. gate-to-source voltage fig. 8 - typical source-drain diode forward voltage fig. 9 - maximum safe operating area fig. 10 - maximum drain cu rrent vs. case temperature fig. 11 - temperature vs . drain-to-source voltage 0 4 8 12 16 20 24 0 1020304050 v gs , g ate-to- s ource voltage (v) q g , total g ate charge (nc) v d s = 400 v v d s = 250 v v d s = 100 v 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i s d , rever s e drain current (a) v s d , s ource-drain voltage (v) t j = 150 c t j = 25 c v gs = 0 v 0.01 0.1 1 10 100 1101001000 i d , drain current (a) v d s , drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecified limited by r d s (on) * i dm limited t c = 25 c t j = 150 c s ingle pul s e bvd ss limited 10 m s 100 s operation in thi s area limited by r d s (on) 1 m s 0 3 6 9 12 25 50 75 100 125 150 i d , drain current (a) t c , ca s e temperature ( c) 475 500 525 550 575 600 625 650 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 v d s , drain-to- s ource breakdown voltage (v) t j , junction temperature ( c) i d = 250 a
SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 5 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 12 - normalized thermal transient impedance, junction-to-case fig. 13 - switching time test circuit fig. 14 - switching time waveforms fig. 15 - unclamped inductive test circuit fig. 16 - unclamped inductive waveforms fig. 17 - basic ga te charge waveform fig. 18 - gate charge test circuit 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 normalized effective tran s ient thermal impedance pul s e time ( s ) duty cycle = 0.5 0.2 0.1 0.05 0.02 s ingle pul s e pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f r g i as 0.01 t p d.u.t l v ds + - v dd 10 v var y t p to obtain required i as i as v ds v dd v ds t p q gs q gd q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
SIHB12N50E www.vishay.com vishay siliconix s15-0278-rev. b, 23-feb-15 6 document number: 91632 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 19 - for n-channel vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91632 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak dio d e recovery d v/ d t test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
document number: 91364 www.vishay.com revision: 15-sep-08 1 package information vishay siliconix to-263ab (high voltage) notes 1. dimensioning and toler ancing per asme y14.5m-1994. 2. dimensions are shown in millimeters (inches). 3. dimension d and e do not include mold flash. mold flash shal l not exceed 0.127 mm (0.005") per side. these dimensions are me asured at the outmost extremes of the plastic body at datum a. 4. thermal pad contour optional within dimension e, l1, d1 and e1. 5. dimension b1 and c1 apply to base metal only. 6. datum a and b to be determined at datum plane h. 7. outline conforms to jedec outline to to-263ab. 5 4 1 3 l1 l2 d b b e h b a detail a a a c c2 a 2 x e 2 x b 2 2 x b 0.010 a b mm 0.004 b m base metal plating b 1, b 3 ( b , b 2) c1 (c) section b - b and c - c scale: none lead tip 4 34 (dat u m a) 2 c c b b 5 5 v ie w a - a e1 d1 e 4 4 b h seating plane ga u ge plane 0 to 8 detail ?a? rotated 90 cw scale 8 :1 l3 a1 l4 l millimeters inches millimeters inches dim. min. max. min. max. dim. min. max. min. max. a 4.06 4.83 0.160 0.190 d1 6.86 - 0.270 - a1 0.00 0.25 0.000 0.010 e 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 e1 6.22 - 0.245 - b1 0.51 0.89 0.020 0.035 e 2.54 bsc 0.100 bsc b2 1.14 1.78 0.045 0.070 h 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 l 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 l1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 l2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 l3 0.25 bsc 0.010 bsc d 8.38 9.65 0.330 0.380 l4 4.78 5.28 0.188 0.208 ecn: s-82110-rev. a, 15-sep-08 d w g: 5970
an826 vishay siliconix document number: 73397 11-apr-05 www.vishay.com 1 recommended minimum pads for d 2 pak: 3-lead 0.635 (16.129) recommended minimum pads dimensions in inches/(mm) 0.420 (10.668) 0.355 (9.017) 0.145 (3.683) 0.135 (3.429) 0.200 (5.080) 0.050 (1.257) return to index
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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